
PIC16F87XA
DS39582B-page 152
2003 Microchip Technology Inc.
FIGURE 14-7:
TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO VDD): CASE 1
FIGURE 14-8:
TIME-OUT SEQUENCE ON POWER-UP (MCLR NOT TIED TO VDD): CASE 2
FIGURE 14-9:
SLOW RISE TIME (MCLR TIED TO VDD VIA RC NETWORK)
TPWRT
TOST
VDD
MCLR
Internal POR
PWRT Time-out
OST Time-out
Internal Reset
VDD
MCLR
Internal POR
PWRT Time-out
OST Time-out
Internal Reset
TPWRT
TOST
VDD
MCLR
Internal POR
PWRT Time-out
OST Time-out
Internal Reset
0V
1V
5V
TPWRT
TOST